Lead Package Design Engineer

Tenstorrent in Austin, TX

The Tenstorrent team combines technologists from different disciplines who come together with a shared passion for AI and a deep desire to build great products. We value collaboration, curiosity, and a commitment to solving hard problems. Find out more about our culture .

The person hired for this role will lead package design for high-performance chiplets and SOCs. They will be involved in all stages, from concept to high-volume manufacturing, and will be responsible for designing packaging solutions that meet industry leading power, performance, and cost targets.  The work will be done alongside a group of highly experienced engineers across various domains of the AI/ML chip.
Locations:
Austin, TX, Santa Clara, CA, or Toronto, Ontario

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been sanctioned by the U.S. government.

As this position will have direct and/or indirect access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency information and/or documentation will be required and considered as Tenstorrent moves through the employment process.
    • All aspects of package design including SI/PI, STA, routing, reliability, thermal, mechanical, manufacturability, bumping, substrate, material selection, assembly, and support for testing
    • All aspects of package planning including pre/post silicon bring up, yield improvements, qualification, failure analysis, and system implementation
    • Collaborating with design engineers to develop a portfolio of chiplets that meets a huge range of price-performance design points while optimizing re-use
    • Meeting specifications for high speed interfaces such as HBM, DDR, GDDR, PCIE, 112G SerDes
    • Overseeing OSAT and substrate suppliers
    • Managing the production of the IC package, including monitoring the manufacturing process and ensuring that the package is produced to the required quality and reliability standards
    • BS/MS/PhD in EE/ECE/ME/ChemE or related disciplines
    • More than 10 years of experience in advanced packaging design and implementation
    • Hands-on experience with modeling thermo-mechanical stress and/or SI/PI
    • Well versed in advanced packaging techniques including InFO, CoWoS, FoCoS, EMIB variants, hybrid bonding
    • Excellent understanding of circuit, mechanical, and thermodynamic fundamentals
    • Experience with optical module integration is an asset
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