Physical Design Engineer

Tenstorrent in Austin, TX

The Tenstorrent team combines technologists from different disciplines who come together with a shared passion for AI and a deep desire to build great products. We value collaboration, curiosity, and a commitment to solving hard problems. Find out more about our culture .

The role is physical design for high-performance designs going into industry leading AI/ML architectures. The person coming into this role will be involved in all implementation aspects from synthesis to tapeout for various IPs on the chip. The work is done collaboratively with a group of highly experienced engineers across various domains of the ASIC.
Locations:
Austin, TX | Santa Clara, CA | Fort Collins, CO

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been sanctioned by the U.S. government.

As this position will have direct and/or indirect access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency information and/or documentation will be required and considered as Tenstorrent moves through the employment process.
    • Work closely with other PD engineers and the front end team to understand the chip architecture and drive physical design considerations early in the project cycle
    • Physical design tasks such as synthesis, PnR, timing closure, area improvement, floor-planning, clocking, I/O planning and power optimization
    • Learn and implement end-to-end flow development, synthesis to sign off
    • Deploy innovative techniques for improving power, performance and area of the design, drive experiments with RTL, and evaluate synthesis, timing and power results
    • BS/MS/PhD in EE/ECE/CE/CS
    • Some experience with synthesis, place and route flows and tools
    • Basic familiarity with timing, EM/IR, and power analysis tools
    • Knowledge of low-power design techniques such as power gating, multi-Vt and voltage scaling
    • Strong programming skills in Tcl/Perl/Shell/Python
    • Good understanding of logic design fundamentals and gate/transistor level implementation
    • Strong problem-solving skills
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